 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| VIA Technologies, Inc. 1045 Mission Court. Fremont, CA 94539 USA TEL: 1-510-683-3300 FAX: 1-510-683-3301 VT8225 8th. Fl., No. 533 Chung-cheng Rd.,Hsin-tien Taipei, Taiwan, R.O.C. TEL: 886-2-218-5452 FAX: 886-2-218-5453 VT8225 Clock Generator Date: July 5, 1994 Features Generates essential clock signals for the motherboard 4V to 7V operating supply range Supports 80286, 80386 and 80486 based designs Wide range of selectable output frequencies < 2ns skew between CPU and 2X CPU clock outputs Single low cost crystal (14.318Mhz) used as reference frequency Smooth transition on frequency switching 50% duty cycle Power down mode for low power consumption TTL or CMOS compatible outputs with 12mA drive capability Low, short and long term jitter 14 pin DIP and 14 pin SOIC (300 mil body) package options Description The VT8225 is a universal clock generator for motherboard design. The product at a glimpse: 1. Generates all kinds of required clocks for CPU and bus operation from 6 Mhz to 80 Mhz. 2. Eliminates at least two oscillators, which are oscillators for CPU and 14.318MHz oscillator. 3. Simplifies inventory: VT8225 covers required main clock for the motherboard design. 4. Provides a reliable clock for the PLL design. 5. Is pin-to-pin compatible to oscillator. -1- VIA Technologies, Inc. VT8225 VT8225 Signal Description Symbol Pin No. X1 X2 S0 S1 S2 S3 MCLK RESET# TS OSC 2 3 4 5 10 9 8 11 1 13 Type I I/O I I I I O O I O Functions These pins form an on-chip reference oscillator when connected to terminals of an external parallel resonant crystal (norminally 14.318Mhz). X1 may also serve as input for an externally generated reference signal. Frequency select inputs. These inputs control the MCLK frequency selection. All these inputs have internal pull-ups. Table 1 below shows the output frequency selection conditions. Master clock output. Programmable output frequencies can be selected using So-S3. Chip reset, negative true. Tri-state input pin. When high, all outputs are tri-stated. When low outputs are enabled. This pin has an internal pull-down. 14.31818 Mhz output. Buffered output of on-chip reference oscillaor or externally provided reference. This is the phase detector output for the clock generator. It is single-ended, tri-state output for use as loop error signal. A 0.1uF capacitor to ground should be connected from this pin to form the loop filter. Digital Negative power supply. Analog Negative power supply. Positive power supply. PD 6 O VSS AVSS VDD 7 12 14 Ground Ground Power S2 0 0 0 0 1 1 1 1 MCLK FREQUENCY SELECTION INPUTS MCLK OUTPUT S1 S0 S3=1 (Bank 1) S3=0 (Bank 0) 0 0 8 Mhz 16 Mhz 0 1 20 Mhz 40 Mhz 1 0 25 Mhz 50 Mhz 1 1 40 Mhz 80 Mhz 0 0 33.3 Mhz 66.6 Mhz 0 1 50 Mhz 100 Mhz 1 0 4 Mhz 8 Mhz 1 1 2 Mhz 4 Mhz Table 1 clock frequency selection Note : The smooth transition of frequency change is only allowed within the same selection bank. -2- VIA Technologies, Inc. VT8225 TS X1 X2 S0 S1 PD VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD OSC AVSS RESET S2 S3 MCLK2 Figure 1: Connection Diagram for Plastic Dip or SOIC Package MAXIMUM RATINGS Voltage relative to VSS :.................-0.3V TO 7V Voltage relative to VDD:.................0.3V Storage temperature:........................-65 oC to 150oC Ambient temperature: ......................-55oC to +125oC Recommended Operating Range: ....4V - 7V This device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, precautions should be taken to avoid application of any voltage higher than the maximum rated voltages to this circuit. For proper operation, Vin and Vout should be constrained to the range: VSS < (Vin or Vout) < VDD Unused inputs must always be tied to an appropriate logic voltage level (either VSS or VDD). ELECTRICAL CHARACTERISTICS Characteristic Input Low Voltage Input High Voltage Input Low Current With Pull-up or Pull-down Input High Current With Pull-up or Pull-down Output Low Voltage IOL = 12mA Output High Voltage IOH = 12mA Tri-State Leakage Current Static Supply Current Dynamic Supply Current Short Circuit Current Symbol VIL VIH IIL IIH VOL VOH Min 2.0 2.4 Typ Max 0.8 5 + 50 5 + 50 0.4 Units Vdc Vdc A A Vdc Vdc A IOZ 10 A IDD 10 ICC 35 mA ISC 25 mA VDD = 5V + 10%, TA = -40oC to +85oC, CL = 50pF -3- VIA Technologies, Inc. VT8225 SWITCHING CHARACTERISTICS Characteristics Output Rise(0.8v-2.0v) and Fall Time (2.0v-0.8v) Output Enable TS to All Output Duty Cycle All Output Jitte, One Sigma Jitter, Absolute Frequency Transition Time Power Up Time Input Rise and Fall Times OSCIN Symbol tTLH, tTHL tZ dT 40 48/52 Min Typ Max 2 35 60 Units ns ns % tJ1S +0.5 +2 % tABS +3 +5 % tFT 20 ms tPU 15 40 ms tTLH,tTHL 3 1 us VDD = 5V + 10%, TA = -40oC to +85oC, CL = 50pF -4- |
Price & Availability of VT8225
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |